Intelligent Interconnects for AI Infrastructure
Powered by AWP Analog Wave Processing + TSLink™
200G/lane connectivity for 1.6T, 3.2T and next-generation AI scale-up infrastructure.
Lotus 200G/Lane Interconnect Platform
The TeraSignal™ Lotus family brings together high-speed optical and copper connectivity products for 200G/lane AI interconnects. Built on advanced CMOS technology, Lotus combines Analog Wave Processor (AWP) wave-domain processing with TSLink™ intelligent link training and monitoring to deliver lower-power, lower-latency linear connectivity for AI scale-up infrastructure.
AWP + TSLink™ Intelligent Connectivity
TeraSignal combines two complementary technologies to bring intelligence and advanced signal processing directly into the physical link. AWP performs high-speed wave-domain processing to compensate for channel impairments, while TSLink measures link conditions, performs CMIS-based link training and optimizes connectivity in real time. Together, they increase link margin, improve robustness and extend the practical reach of DSP-free linear interconnects.
Our Product Categories
Low-Power Transceivers
TeraSignal's low-power transceivers are engineered to deliver exceptional performance while minimizing energy consumption. Designed for AI applications where efficiency is paramount, our transceivers enable organizations to achieve their sustainability goals without sacrificing performance.
Low-Latency Technology
Experience real-time responsiveness like never before with TeraSignal's low-latency technology. Our transceivers ensure minimal delays in data transmission, making them ideal for applications requiring instantaneous decision-making and critical insights.
High-Speed Connectivity
Achieve unparalleled data transfer rates with TeraSignal's high-speed connectivity solutions. Designed to facilitate seamless communication within AI clusters, our transceivers enable organizations to maximize the capabilities of their AI infrastructure and drive innovation at scale.
Lotus™ Product Family
TeraSignal™ TS5802 — 200G/Lane Copper Redriver
Advanced CMOS redriver for high-speed copper interconnects, combining AWP wave processing with TSLink™ intelligent link training to improve link margin, reach and reliability.
TeraSignal™ TS8802 — 200G/Lane Linear MZM Driver
High-speed linear modulator driver designed for next-generation optical interconnects, delivering ultra-high bandwidth, high linearity and low-power operation for 200G/lane connectivity.
TeraSignal™ TS9802 — 200G/Lane Linear TIA
High-speed linear transimpedance amplifier for 200G/lane optical receivers, designed to deliver broadband performance, low noise and intelligent connectivity for next-generation linear optics.
TeraSignal™ TS8401/TS8402 — 400G Intelligent Modulator Drivers
TeraSignal’s established 4x100G PAM4 modulator driver family with integrated digital eye monitoring, CMIS-based link training and low-power CMOS implementation for 800G LPO modules.
Ordering Information
To place an order, email info@terasignal.com with the desired part number, quantity, and your company contact information. Our team will confirm availability and provide purchase order instructions.
200G/Lane Lotus Technology Highlights
- AWP Analog Wave Processing: Performs weighting, delay and accumulation directly on broadband waveforms.
- Ultra-High Bandwidth: Designed for 200G/lane and future higher-speed interconnects.
- Linear Amplitude & Phase: Preserves broadband waveform fidelity for demanding PAM4 links.
- TSLink Intelligence: CMIS-based link training, monitoring and adaptive link optimization.
- Optical + Copper Connectivity: Supports ACC, LPO, NPO and CPO architectures.
TSLink™ Benefits
Automatic Link Training
CMIS-based link training automatically adapts link parameters to actual channel conditions.
Real-Time Link Monitoring
Provides visibility into link and channel conditions to improve system reliability.
Improved Link Margin
Optimizes the link for greater robustness across demanding channel environments.
Lower Power
Enables intelligent linear connectivity without adding the power penalty of a conventional DSP.
Lower Latency
Maintains the near-zero-latency advantages of linear interconnect architectures.
Adaptive Connectivity
Works with AWP to identify channel impairments and dynamically optimize link performance.
TeraSignal’s product portfolio spans 100G and 200G/lane intelligent connectivity for optical and copper interconnects. The Lotus family, TS5802, TS8802 and TS9802, brings AWP and TSLink to next-generation 200G/lane systems, while the proven TS8401/02 family continues to support intelligent 800G LPO applications. Together, TeraSignal’s technologies enable lower-power, lower-latency connectivity across AI and high-performance computing infrastructure.
What Are Intelligent Interconnects?
Intelligent interconnects combine high-speed analog connectivity with embedded monitoring, adaptive link training and advanced signal processing. TeraSignal brings intelligence directly into the connectivity layer through Analog Wave Processing (AWP) and TSLink, allowing optical and copper links to understand channel conditions, compensate for impairments and optimize performance without relying on power-hungry DSP-based retiming. The result is lower power, lower latency and improved reliability for next-generation AI infrastructure.