At TeraSignal, innovation starts with people. We bring together engineers, thinkers, and creators from across the industry to reimagine the future of data movement. As pioneers in intelligent interconnect technology, we’re building the foundation for next-generation AI, cloud, and networking infrastructure.
Here, you won’t just work on cutting-edge technology, you’ll help define it. We offer a collaborative, fast-moving environment that values intellectual curiosity, shared growth, and making a real impact.
Whether you’re solving analog challenges or pushing the limits of photonics, you’ll be part of a team that believes breakthroughs happen when talented minds connect.
If you’re ready to build the future of high-speed connectivity, we’d love to meet you.
We believe that collaboration is the spark that drives big ideas. By blending deep domain expertise with cross-functional teamwork, we learn from each other every day, and build better solutions because of it. Our culture thrives on shared discovery, trust, and the belief that together, we go farther.
Company Description
TeraSignal is leading the way in developing cutting-edge CMOS electronics to revolutionize AI and computational interconnects. With a focus on innovative signal conditioning technology for high-speed interconnects, TeraSignal addresses critical challenges in high-speed data transmission, delivering lower power consumption, reduced latency, and enhanced reliability. These solutions are designed to support advanced AI deployments in data centers. Discover more about TeraSignal’s advancements in intelligent silicon solutions for AI interconnects at terasignal.com.
Role Description
We are seeking a full-time Senior Application Engineer to join our team on-site in Irvine, CA. In this role, you will be responsible for designing, developing, and optimizing hardware and firmware for our innovative CMOS-based solutions. Daily tasks include debugging hardware, collaborating with hardware engineers, implementing reference designs, writing application notes and supporting customers. You will also contribute to improving performance and functionality to support high-speed data transmission over copper and optical interconnects.
Qualifications
Salary Range: $120K-$200k , with Employees stock options
Company Description
TeraSignal is leading the way in developing cutting-edge CMOS electronics to revolutionize AI and computational interconnects. With a focus on innovative signal conditioning technology for high-speed interconnects, TeraSignal addresses critical challenges in high-speed data transmission, delivering lower power consumption, reduced latency, and enhanced reliability. These solutions are designed to support advanced AI deployments in data centers. Discover more about TeraSignal’s advancements in intelligent silicon solutions for AI interconnects at terasignal.com.
Role Description
We are seeking a full-time Silicon Validation Engineer to join our team on-site in Irvine, CA. In this role, you will be responsible for characterizing next-generation high-speed interconnect ICs used in AI compute platforms and datacenters. Daily tasks include developing test methodologies, debugging evaluation hardware, performing signal integrity validation, and supporting customers integrating our devices into their systems. You will also contribute to improving product performance, ensuring customer success, and strengthening the overall technical credibility of the company.
Qualifications
Compensation
Salary Range: $60K–$160K, with employee stock options
Company Description
TeraSignal is leading the way in developing cutting-edge CMOS electronics to revolutionize AI and computational interconnects. With a focus on innovative signal conditioning technology for high-speed interconnects, TeraSignal addresses critical challenges in high-speed data transmission, delivering lower power consumption, reduced latency, and enhanced reliability. These solutions are designed to support advanced AI deployments in data centers. Discover more about TeraSignal’s advancements in intelligent silicon solutions for AI interconnects at terasignal.com.
Role Description
This is a high-impact, hands-on engineering role with end-to-end ownership of the signal integrity (SI) lifecycle for next-generation high-speed hardware—from initial architecture and simulation through lab validation and production. You will serve as a subject matter expert bridging silicon, package, and PCB design, ensuring robust performance for the world’s most demanding data center, networking, and AI/ML compute environments.
Responsibilities
Qualifications
Salary Range: $100K–$200K, with employee stock options
Location: Irvine, California
Company: TeraSignal Corp.
Position: Full-time
Position Overview
TeraSignal is developing advanced high-speed analog ICs for next-generation AI and data-center interconnects. We are seeking an Optical Test Engineer to characterize and validate our high-speed linear TIAs, optical drivers, and Analog Wave Processor (AWP) technology with real optical components and complete optical links.
The engineer will build and operate high-speed optical test setups integrating TeraSignal ICs with photodiodes, silicon photonics, Mach-Zehnder modulators (MZMs), VCSELs, optical fibers, and high-speed SerDes/DSP test equipment. The role spans device characterization through complete 100G/200G/400G-per-lane optical-link evaluation.
This is a hands-on laboratory position requiring strong understanding of both high-speed electrical measurements and optical communications.
Key Responsibilities
Laboratory Equipment
The ideal candidate will have hands-on experience with several of the following:
High-speed oscilloscopes and sampling scopes; BERTs and PAM4 pattern generators; optical modulation analyzers; VNAs; optical power meters; optical spectrum analyzers; tunable lasers; optical attenuators; polarization controllers; high-speed photodiodes; MZMs; VCSELs; optical probes/fiber coupling; RF probes and probe stations; bias tees; high-speed cables and fixtures; and temperature chambers.
Experience with equipment from Keysight, Anritsu, Tektronix, Rohde & Schwarz, Coherent or equivalent vendors is highly desirable.
Required Qualifications
Preferred Qualifications
Experience with 100G/200G-per-lane PAM4, LPO/NPO/CPO optical architectures, silicon photonics, MZM biasing, VCSEL links, linear optical receivers, IEEE 802.3 optical specifications, CMIS, optical-module development, or semiconductor IC characterization would be particularly valuable.
Experience working directly with IC designers is also desirable because this position should do more than run compliance tests—the engineer should be able to determine why silicon or an optical link behaves the way it does and work with the design team to improve it.
What Success Looks Like
The engineer will establish a repeatable optical characterization environment in TeraSignal’s lab that allows us to take a new TIA or driver from first silicon to a complete 200G/lane optical demonstration, quantitatively identify the limitations of the IC, photonic device and channel, and demonstrate how AWP improves real-world optical-link performance.
Equal Opportunity
TeraSignal is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees and interns, and we do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, or any other protected characteristic.
Work Authorization
Applicants must be legally authorized to work in the United States without the need for employer-sponsored work authorization now or at any point in the future. TeraSignal does not sponsor immigration petitions or visa applications of any kind — including, without limitation, H-1B, TN, E-3, or other employment-based visa classifications. This applies regardless of whether authorization is sought at the outset of employment or at a later date, including in connection with a change in status or an extension of stay.
Intelligent Interconnects for AI and Compute.